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  f340 : XRAM

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Author Topic:   f340 : XRAM
hafblud
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posted August 17, 2010 06:44 AM     Click Here to See the Profile for hafblud   Click Here to Email hafblud     Edit/Delete Message
Hi
I didn't find where to ask for help about XRAM. Please ignore if I am posting in a wrong thread.

I have a question about interfacing f340 with external XRAM. I couldn't find how how to configure the IOs while connecting a uC with EPROM. I mean to say, which IO pin to connect with which flash pin .

I am using the flash (M29W320ET).

http://www.datasheetcatalog.org/datasheet2/7/0trulfzexhj3y9uearzeed0u69fy.pdf

Please refer me to some document which explains the connection of pins.

regards
hafblud

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erikm
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posted August 17, 2010 06:56 AM     Click Here to See the Profile for erikm   Click Here to Email erikm     Edit/Delete Message
connecting a uC with EPROM

The SILabs chips are (for obvious reasons) incapable of operating from external CODE memory. Using EPROM as external DATA memory makes no obvious sense. Please clarify.
Also when giving links to datasheets link to the MANUFACTURERs site not some datasheet collection site where looging on is guaranteeing you a bucketful of spam.

Erik

[This message has been edited by erikm (edited August 17, 2010).]

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Scotty
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posted August 17, 2010 07:07 AM     Click Here to See the Profile for Scotty     Edit/Delete Message
Hi hafblud,

Please refer me to some document which explains the connection of pins.
Usually the datasheets of the parts which should be connected together

I mean to say, which IO pin to connect with which flash pin .
Since the 8051 is a 8-bit MCU, and the 16-bit Flash you've chosen can be driven in a 8-bit mode, I'd connect it as follows (seen from flash):
- D7-D0 to the databus
- #OutputEnable to #ReadStrobe
- #WriteEnable to #WriteStrobe
- DQ15A–1 to A0 of address bus
- A14-A0 to A15-A1 of address bus(one bit shift!)
- A20-A15 to GPIO
- #ChipEnable to GPIO
- #Byte to GND

Regards,

Scotty

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hafblud
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posted August 17, 2010 09:54 AM     Click Here to See the Profile for hafblud   Click Here to Email hafblud     Edit/Delete Message
Hi

@Erkim
I need to store and read data in mbs, which is not possible with internal RAM of f340. XRAM is not for code purposes just a data storage.

@Scotty

Actually i need to know the DATABUS & ADDRESS BUS pins on the uC.

" - D7-D0 to the databus "
what pins on uC are DATABUS

" - DQ15A–1 to A0 of address bus "
what is address bus on f340

[This message has been edited by hafblud (edited August 17, 2010).]

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erikm
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posted August 17, 2010 11:09 AM     Click Here to See the Profile for erikm   Click Here to Email erikm     Edit/Delete Message
I need to store and read data in mbs, which is not possible with internal RAM of f340. XRAM is not for code purposes just a data storage.
OK, you are ware that you can not "just write" to flash, you need to erase the associated page first.

Re external memory:
it all dpends on how many port pins you need for other things, you can go multiplexed (19 pins for memory) or non-multiplexed (26 pins for mrmoy interface)

You need to set up the crossbar correctly, see if config will do it for you.

BUT: no definite answer can be given till you decide on (non-)multiplexed.

Erik

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tony.hague
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posted August 17, 2010 11:31 AM     Click Here to See the Profile for tony.hague     Edit/Delete Message
Before telling you to go and read the datasheet I had a look myself, and it is surprisingly hard to find ! The best source are the timing diagrams on P131, which reveal:

Non multiplexed mode-
A8-15 on P2
A0-7 on P3
D0-7 on P4
/WR on P1.7
/RD on P1.6

Multiplexed
AD0-7 on P4
A8-15 on P3
ALE on P1.3
/RD, /WR as non-multiplexed.

I would have thought that this could be set out somewhere other than in the samll print of a timing diagram ...

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hafblud
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posted August 17, 2010 05:29 PM     Click Here to See the Profile for hafblud   Click Here to Email hafblud     Edit/Delete Message
Thank you for pointing out the timing diagram, i really looked hard every where in the data sheet (except for timing diagrams).

@Erkim
I am using mutiplexed mode. 4mb flash (22 pins req. only). 16 pins from internal RAM (as Scotty mentioned) and 6 MSB by GPIO. I just couldn't find the uC address and data pins details.

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hafblud
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posted August 17, 2010 05:32 PM     Click Here to See the Profile for hafblud   Click Here to Email hafblud     Edit/Delete Message
@Erkim

" OK, you are ware that you can not "just write" to flash, you need to erase the associated page first "

I think first i needed to know where to connect the flash, thats why i only asked for the details of data & address pins of uC.

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Scotty
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posted August 17, 2010 06:34 PM     Click Here to See the Profile for Scotty     Edit/Delete Message
Hi hafblud,

Erikm:" OK, you are ware that you can not "just write" to flash, you need to erase the associated page first "
hafblud:I think first i needed to know where to connect the flash, thats why i only asked for the details of data & address pins of uC.

What Erik wants to say is that you only can write single bytes if the corresponding flash page has been erased. If a byte has a value other than 0xFF and the byte must be rewritten then the complete page containing the byte must be erased prior to re-programming.

Regards,

Scotty

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erikm
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posted August 18, 2010 06:52 AM     Click Here to See the Profile for erikm   Click Here to Email erikm     Edit/Delete Message
I am using mutiplexed mode
DO NOT substitute the address latch chip, many have tried and failed.

Erik

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hafblud
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posted December 30, 2010 12:12 PM     Click Here to See the Profile for hafblud   Click Here to Email hafblud     Edit/Delete Message
Hi.
I am asking a question on the same topic after quite a long time, for i am troubled again.

Do we have to skip (PxSKIP) the pins that are dedicated for Memory or writing to Flash Operations (P1.3, P1.6, P1.7, P2, P3, P4) ?

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vanmierlo
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posted December 31, 2010 03:51 AM     Click Here to See the Profile for vanmierlo   Click Here to Email vanmierlo     Edit/Delete Message
This actually is written in the datasheet in 13.4:
When the EMIF is used, the Crossbar should be configured to skip over the control lines P1.7 (/WR), P1.6 (/RD), and if multiplexed mode is selected P1.3 (ALE) using the P1SKIP register.
They say nothing about P2 and P3 but since they are the last ones anyway I don't think it really matters. P4 is not part of the crossbar.

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hafblud
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posted January 05, 2011 10:12 AM     Click Here to See the Profile for hafblud   Click Here to Email hafblud     Edit/Delete Message
Thanks

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