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  C8051F500 crystal osc.

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Author Topic:   C8051F500 crystal osc.
YGromov
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posted July 26, 2010 04:34 AM     Click Here to See the Profile for YGromov     Edit/Delete Message
Hi!

I need to run C8051F500 with external
crystal 24M.
Unfortunatelly, Config2 recommented code,
nor another recommendations from SiLabs forums are not working. There is no oscillation. XTAL1,2 == 0.
Have tryed number of crystals, capacitors etc.

Chip environment:
- Vregin = 5v
- internal Vregulator = 2.6v (default)
- Vdd wired to Vdda (with capacitors)
- Gnd wired to Gnda
- crystal = 24M
- crystal capacitors = 22pF (10pF-same result)
- crystal load = 10MOhm (1M-same result)
- watch dog - disabled

Code (on Startup):
mov SFRPAGE, #0Fh
mov OSCICN, #11010111b
mov P0MDIN, #11110011b
mov P0SKIP, #00001100b
mov XBR2, #040h
orl P0, #0Ch
mov OSCXCN, #67h

call Delay_1mS
mov r1, #200

osc_wait: ; wait for XTLVLD-->1 (osc ready)
mov a, OSCXCN
jb Acc.7, OSC_OK
call Delay_1mS
djnz r1, osc_wait
; ---- osc not working
OSC_OK:
; osc ok
--------------
OSCXCN.7 never gets '1'

All above conforms to F500 datasheet.
What is wrong?
Could you help me?

Regards,
Yury

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erikm
Member
posted July 26, 2010 06:39 AM     Click Here to See the Profile for erikm   Click Here to Email erikm     Edit/Delete Message
a guess:
"A wire is NOT a wire"
Are the connections to the crystal, burden caps etc less than 1cm?

Erik

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YGromov
New Member
posted July 26, 2010 06:54 AM     Click Here to See the Profile for YGromov     Edit/Delete Message
Thank you for reply
"wire" == PCB traces, of cource
all the crystal related traces are
less than 10mm.
Also note that I have tryed 32768Hz crystall
(which is not so critical to PCB)
(with appropriate OSCXCN settings) -
without any luck

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vanmierlo
Member
posted July 27, 2010 04:58 AM     Click Here to See the Profile for vanmierlo   Click Here to Email vanmierlo     Edit/Delete Message
What is in P0SKIP and P0MDIN ? Have you read the important note on external oscillator usage in section 19.4 of the datasheet?

Maarten

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YGromov
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posted July 27, 2010 05:19 AM     Click Here to See the Profile for YGromov     Edit/Delete Message
Thank you for reply.

I have read the section 19 of F500
datasheet carefully.

Registers settings are:
(from start of this topic)
mov SFRPAGE, #0Fh
mov OSCICN, #11010111b
mov P0MDIN, #11110011b
mov P0SKIP, #00001100b
mov XBR2, #040h
orl P0, #0Ch
mov OSCXCN, #67h
.....

Is something wrong or forgotten?

Yury

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tony.hague
Member
posted July 27, 2010 06:18 AM     Click Here to See the Profile for tony.hague     Edit/Delete Message
I've used the F584 (which should be the same in these respects) with an external crystal, without problem. Looking at your code, the SiLabs example (F500_Oscillator_Crystal.c), and my code, I can't see anything obvious. The only things that occur is that it is recommend to enable the Vdd monitor and missing clock detector - but it's only a recommendation. Also you appear to first change the internal oscillator divisor to 1 from the default of 128 - presumably your Delay_1mS does do what it should at that clock rate ?

[This message has been edited by tony.hague (edited July 27, 2010).]

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YGromov
New Member
posted July 27, 2010 08:54 AM     Click Here to See the Profile for YGromov     Edit/Delete Message
F500_Oscillator_Crystal.c example does not work on my F500 too...

Delay_1ms does 1ms delay with 24M oscillator. With /128 prescaller
it will do 128ms delay. I think, this is
not important.

There is one strange fragment form F50x (and F58x) datasheet (19.4.1):
"The recommended procedure is:
1. Force XTAL1 and XTAL2 to a high state.
This involves enabling the Crossbar
and writing 1 to the port pins associated
with XTAL1 and XTAL2."

F500_Oscillator_Crystal.c does not set
XTAL1,2 pins explisity.

Thanks for reply
Yury

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erikm
Member
posted July 27, 2010 08:56 AM     Click Here to See the Profile for erikm   Click Here to Email erikm     Edit/Delete Message
1. Force XTAL1 and XTAL2 to a high state.
This involves enabling the Crossbar
and writing 1 to the port pins associated
with XTAL1 and XTAL2."

F500_Oscillator_Crystal.c does not set
XTAL1,2 pins explisity.

if you look at the SFR descriptions in the datasheet you will in the header see "reset state" have a look

Erik

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vanmierlo
Member
posted July 28, 2010 03:49 AM     Click Here to See the Profile for vanmierlo   Click Here to Email vanmierlo     Edit/Delete Message
Maybe you can try to give it a kick by setting XTAL2 low first as discussed in this thread for the F410.

Maarten

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YGromov
New Member
posted August 02, 2010 06:40 AM     Click Here to See the Profile for YGromov     Edit/Delete Message
Tried to kick XTAL2 (and XTAL1 and both)
to 0 and to 1 - unsuccessfully.

May be, my F500 chip is defective.
Will try with another F500 chip, as soon
as finish the preliminary hw/sw debug.

Yury

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erikm
Member
posted August 02, 2010 07:13 AM     Click Here to See the Profile for erikm   Click Here to Email erikm     Edit/Delete Message
since you definitely sound 'commercial' I can figure what your time cost.

Thus you will SAVE lots of money by buying a devboard. That will give you definite answer re custom hardware functioning or not

Erik

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dmgsensortec
New Member
posted August 31, 2010 12:02 AM     Click Here to See the Profile for dmgsensortec     Edit/Delete Message
Hi, you could check that you don't have revision A of the device. I saw in the errata that the external clock did not work correctly on revision A.

Regards,

Dwayne

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