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Author Topic:   Zero Unique ID after flash programming
x893
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posted August 26, 2010 05:27 PM     Click Here to See the Profile for x893     Edit/Delete Message
Hi,
chip return zeros Unique ID after flash programming (C8051F342). How to recovery correct values ?

Thanks in advance

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erikm
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posted August 26, 2010 05:59 PM     Click Here to See the Profile for erikm   Click Here to Email erikm     Edit/Delete Message
what is "Unique ID"

I, probably, know what it is with another name, but not that one.

Erik

[This message has been edited by erikm (edited August 26, 2010).]

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x893
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posted August 26, 2010 06:12 PM     Click Here to See the Profile for x893     Edit/Delete Message
Chip return Unique ID after

FPDAT = 0x01
Read FPDAT == 0xD
Read FPDAT = first Unique ID

FPDAT = 0x02
Read FPDAT == 0xD
Read FPDAT = second Unique ID

For C8051F342
Devide ID = 0x09, Revision = 0x02
Unique ID = 0x7F(first), 0x09(second)

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erikm
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posted August 26, 2010 08:34 PM     Click Here to See the Profile for erikm   Click Here to Email erikm     Edit/Delete Message
FPDAT = 0x01
Read FPDAT == 0xD
....

using what?

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x893
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posted August 26, 2010 08:38 PM     Click Here to See the Profile for x893     Edit/Delete Message
I havn't a problem with read Unique ID on new chip (or flashed without error).
I've problem with Unique ID/Read Flash with some chips after programming flash.

i use usb debug adapter

[This message has been edited by x893 (edited August 26, 2010).]

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Tsuneo
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posted August 27, 2010 05:42 AM     Click Here to See the Profile for Tsuneo   Click Here to Email Tsuneo     Edit/Delete Message
Hi Erik,

He is talking about chip ID, returned over JTAG / C2 interface.

x893,

> chip return zeros Unique ID after flash programming (C8051F342).

Post the code you've FLASHed to the 'F342.
Sound like it is "dangerous" code, such as,

- 'F342 shares C2D pin with P3.0. When the code makes P3.0 push-pull, C2 interface is disturbed.
- C2 interface relies on internal OSC. When the code stops internal OSC without any other alternative, C2 interface hangs.

When the cause is revealed, we could deal with it.

Tsuneo

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x893
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posted August 27, 2010 03:21 PM     Click Here to See the Profile for x893     Edit/Delete Message
DeviceID and Revision return correct values (for F342 i see 0F and 02). I try both Chip Erase (3 and 4 codes). Write to flash return correct response (0D) but in real flash not program.

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erikm
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posted August 27, 2010 03:54 PM     Click Here to See the Profile for erikm   Click Here to Email erikm     Edit/Delete Message
but in real flash not program

I have no idea what that means

Erik

"more words do not make you appear stupid, they make you appear precise"

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Tsuneo
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posted August 27, 2010 09:05 PM     Click Here to See the Profile for Tsuneo   Click Here to Email Tsuneo     Edit/Delete Message
> DeviceID and Revision return correct values (for F342 i see 0F and 02). I try both Chip Erase (3 and 4 codes). Write to flash return correct response (0D) but in real flash not program.

Ah, I see.
You are making your custom "programmer" pod for 'F342.

Before writing to FLASH, enable VDD monitor (VDM0CN.VDMEN) and set it on RSTSRC (RSTSRC.PORSF)

Visit to this topic, for example. It discussed about F527. You'll need similar procedure before starting FLASH erase/write operation.

Writing to flash using C2
http://www.cygnal.org/ubb/Forum1/HTML/002631.html

Tsuneo

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x893
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posted August 28, 2010 12:03 AM     Click Here to See the Profile for x893     Edit/Delete Message
Thanks Tsuneo for answers

I try make next command sequence

1. C2_WriteAR(0xFF)
2. C2_WriteDR(0xE0)
3. C2_WriteAR(0xFF)
4. C2_ReadDR() = 0xDC (VDMEN = 1 (0x80) and VDDSTAT = 1 (0x40) other bits not described in datasheet)
5. C2_WriteAR(0xEF)
6. C2_WriteDR(0x02)
7. C2_WriteAR(0xEF)
8. C2_ReadDR() = 0x01 (! always return 01, i try write 0x06, 0x20, 0x80)
-- Now chip erase
9. C2_WriteAR(0xAD)
10. C2_WriteDR(0x03)
11. WAIT_InBusy()
12. WAIT_OutReady()
13. C2_WriteAR(0xAD)
14. C2_ReadDR() = 0x03 (!!! except 0x0D as on normal programmed chips)

Also i try set FLKEY via C2
C2_WriteAR(0xB7)
C2_WriteDR(0xA5)
C2_WriteDR(0xF1)
C2_ReadDR() = always 0xFC (bit 0-1 = 0 indicate Flash is write/erase locked)

[This message has been edited by x893 (edited August 28, 2010).]

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Tsuneo
Member
posted August 28, 2010 04:39 AM     Click Here to See the Profile for Tsuneo   Click Here to Email Tsuneo     Edit/Delete Message
The outline is,


// C2 Registers
#define FPDAT 0xAD // <------- for 'F34x

C2_WriteAR(0xFF); // VDM0CN = 0x80; // enable VDD monitor
C2_WriteDR(0x80);
C2_WriteAR(0xEF); // RSTSRC = 0x02; // set VDD monitor on RSTSRC
C2_WriteDR(0x02);
// enable FLASH operation mode
C2_WriteAR(FPCTL); // write first and second key to FPCTL
C2_WriteDR(0x02);
C2_WriteDR(0x01);
Timer3us(20000); // delay 20 ms

C2_DeviceErase(); // erase device - see AN127SW.zip

Tsuneo

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x893
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posted August 28, 2010 06:11 AM     Click Here to See the Profile for x893     Edit/Delete Message
Problem inside C2_DeviceErase()


unsigned char status; // FPI status information holder

C2_WriteAR(FPDAT); // Select the FLASH Programming Data register
// for C2 Data register accesses
C2_WriteDR(DEVICE_ERASE); // Send Device Erase command
Poll_InBusy; // Wait for input acknowledge

// Check status before starting FLASH access sequence
Poll_OutReady; // Wait for status information
status = C2_ReadDR(); // Read FLASH programming interface status
if (status != COMMAND_OK)
return 0; // Exit and indicate error

Here status = 0x03 - not a COMMAND_OK !

Mitek

[This message has been edited by x893 (edited August 28, 2010).]

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